Epitaxial growth of monocrystalline silicon on a monocrystalline silicon substrate is extensively used in the integrated circuit fabrication field. This epitaxial growth is normally carried out by depositing silicon from the vapor phase onto a monocrystalline silicon substrate. In order that this vapor-phase epitaxial silicon growth be successfully carried out, high temperatures in excess of 1000.degree. C. and usually in the order of 1150.degree. C. are conventionally used so that the epitaxially deposited silicon will be monocrystalline in form. If this deposition from the vapor phase is conducted at temperatures below 1000.degree. C., the growth of a uniform monocrystalline epitaxial structure from the vapor phase becomes impractical since polycrystallinity begins to appear in the structure.
While the high temperature epitaxial processes, using temperatures in the order of 1100.degree.-1200.degree. C., have been very effective in producing monocrystalline epitaxial layers, they have been subject to out-diffusion or out-gassing side effects. This phenomenon occurs when the hot silicon vapors come in contact with the silicon substrate at such high temperatures. If the substrate contains regions of varying conductivity-determining atoms such as N+ or P+ pockets, conductivity-determining atoms from these pockets will out-gas or out-diffuse relatively far up into the deposited monocrystalline silicon layer. When the art conventionally used epitaxial layers in the order of from 2 to 6 microns in thickness, this out-diffusion effect usually presented no problem. However, with the art moving in the direction of thinner and thinner epitaxial layers having dimensions below 2 microns and potentially as low as from 5000 A in future technologies, the problem of out-diffusion in vapor-phase epitaxial growth becomes a substantial one since such out-diffused regions will substantially dominate such thin epitaxial layers.
In addition, with the integrated circuit field moving in the direction of devices with active regions having both lateral and vertical dimensions in the order of 1 micron or less, there is a need in the art for methods of producing devices with active regions having controllable vertical conductivity-determining impurity distributions. Of course, the presently used high heat, i.e., diffusion or epitaxial, methods for the introduction of such impurities tend to restrict control of impurity distribution because of the migration of impurities when subjected to such high temperatures. In addition, even when the impurities are introduced by ion implantation at lower temperatures, the vertical distribution given in an ion implanted region will be less than fully controllable because of dopant penetration phenomena during conventional operations such as annealing and multiple-step implantations.